In this work we developed press-pack silicon resistors for current ratings of thousands of amperes. Many prototypes were fabricated (with various resistance values) and characterized, using low-voltage (< 100 V) fast-pulsed (i.e., isothermal) measurements to tune a two-dimensional electro-thermal numerical model. The simulations then provided us with a description of the resistor behavior under high-voltage and high-current conditions that were unattainable by our measurement set-up. The decrease of carrier mobility with electric field causes a non-linear I-V relationship whereby the resistance is lower at low fields and higher at high fields. This feature is useful in snubber applications, where the resistor is used as a current-limiting element during the discharge of the capacitor: the resistance is maximum at the onset of the discharge phase, when current must be limited, then its value decreases with the voltage drop, thus speeding up the transient. The simulations also allowed us to study the temperature dependence of the resistance. We observed a non-monotonic behavior, with an increase of the resistance with temperature due to carrier scattering, followed by a rapid decrease due to thermal generation of excess carriers. These press-packed resistors represent a promising solution for snubber application in stacks with high-power diodes or GTOs, very large currents being allowed by the outstanding heat-sinking capabilities of the press-pack.
|Titolo:||A new silicon resistor technology for very high power snubbers|
|Autori interni:||COVA, Paolo|
|Data di pubblicazione:||2005|
|Appare nelle tipologie:||4.1b Atto convegno Volume|