This paper describes a pulse-width modulated (PWM)-SAR A/D converter (ADC), in 22 nm FD-SOI technology, for mixed-signal accelerators and Machine Learning applications. The ADC integrates an asynchronous control unit to optimize the interaction with an asynchronous PWM D/A converter (DAC), thereby increasing the maximum conversion speed with respect to a synchronous control. The design achieves a conversion speed up to 36MS/s, at 7 bits of resolution, with an improvement of more than three times compared with a synchronous implementation in the same technology. The converter exhibits an energy per conversion of 350 fJ, a signal-to-noise and distortion ratio of 42.5 dB, and a silicon area of 120um2.
A PWM-SAR ADC with Asynchronous Control Unit for Mixed-Signal Accelerators / Caselli, Michele; Boni, Andrea; Caselli, Stefano. - (2024), pp. 1-4. (Intervento presentato al convegno 2024 20th International Conference on Synthesis, Modeling, Analysis and Simulation Methods and Applications to Circuit Design (SMACD) nel 2-5 July 2024) [10.1109/smacd61181.2024.10745459].
A PWM-SAR ADC with Asynchronous Control Unit for Mixed-Signal Accelerators
Caselli, Michele;Boni, Andrea;Caselli, Stefano
2024-01-01
Abstract
This paper describes a pulse-width modulated (PWM)-SAR A/D converter (ADC), in 22 nm FD-SOI technology, for mixed-signal accelerators and Machine Learning applications. The ADC integrates an asynchronous control unit to optimize the interaction with an asynchronous PWM D/A converter (DAC), thereby increasing the maximum conversion speed with respect to a synchronous control. The design achieves a conversion speed up to 36MS/s, at 7 bits of resolution, with an improvement of more than three times compared with a synchronous implementation in the same technology. The converter exhibits an energy per conversion of 350 fJ, a signal-to-noise and distortion ratio of 42.5 dB, and a silicon area of 120um2.I documenti in IRIS sono protetti da copyright e tutti i diritti sono riservati, salvo diversa indicazione.
