Summary The paper describes the implementation of a bandgap reference based on native-MOSFET transistors for low-power sensor node applications. The circuit can operate from −55°C to 125°C and with a supply voltage ranging from 1.5 to 4.2 V. Therefore, it is compatible with the temperature range of automotive and military-aerospace applications, and for direct Li-Ion battery attach. Moreover, the circuit can operate without any dedicated start-up circuit, thanks to its inherent single operating point. A mathematical model of the reference circuit is presented, allowing simple portability across technology nodes, with current consumption and silicon area as design parameters. Implemented in a 55-nm CMOS technology, the voltage reference achieves a measured average (maximum) temperature coefficient of 28 ppm/°C (43 ppm/°C) and a measured sample-to-sample variation within 57 mV, with a current consumption of 420 nA at 27°C.
A low-power native NMOS-based bandgap reference operating from −55°C to 125°C with Li-Ion battery compatibility / Caselli, Michele; van Liempd, Chris; Boni, Andrea; Stanzione, Stefano. - In: INTERNATIONAL JOURNAL OF CIRCUIT THEORY AND APPLICATIONS. - ISSN 1097-007X. - 49:5(2021), pp. 1327-1346. [10.1002/cta.2986]
A low-power native NMOS-based bandgap reference operating from −55°C to 125°C with Li-Ion battery compatibility
Michele Caselli;Andrea Boni;
2021-01-01
Abstract
Summary The paper describes the implementation of a bandgap reference based on native-MOSFET transistors for low-power sensor node applications. The circuit can operate from −55°C to 125°C and with a supply voltage ranging from 1.5 to 4.2 V. Therefore, it is compatible with the temperature range of automotive and military-aerospace applications, and for direct Li-Ion battery attach. Moreover, the circuit can operate without any dedicated start-up circuit, thanks to its inherent single operating point. A mathematical model of the reference circuit is presented, allowing simple portability across technology nodes, with current consumption and silicon area as design parameters. Implemented in a 55-nm CMOS technology, the voltage reference achieves a measured average (maximum) temperature coefficient of 28 ppm/°C (43 ppm/°C) and a measured sample-to-sample variation within 57 mV, with a current consumption of 420 nA at 27°C.File | Dimensione | Formato | |
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