A D/A subconverter (DASC) error correction scheme based on weighting capacitor rotation is adapted to account for finite op-amp gain. Simulations show that reasonable estimates of capacitor mismatch can be obtained even if the actual gain is replaced by a nominal gain differing by as much as a factor of two. DASC capacitor mismatch might therefore be estimated in the foreground at power-up, and most part of the correspondingmismatch noise and mismatch-induced interstage gain error might be cancelled, possibly delegating to a background calibration the task of correcting the remaining interstage gain error, induced by finite op-amp gain and drift with temperature.
Estimation of DAC Weighting Capacitors Mismatch in Pipelined ADCs Employing Finite Gain Op-Amps / M., Tonelli; Chiorboli, Giovanni; Morandi, Carlo. - STAMPA. - (2011), pp. 67-72. (Intervento presentato al convegno IMEKO TC4 International Workshop on ADC Modelling, Testing and Data Converter Analysis and Design, and IEEE 2011 ADC Forum tenutosi a Orvieto, Italy nel 30 June, 1 July 2011).
Estimation of DAC Weighting Capacitors Mismatch in Pipelined ADCs Employing Finite Gain Op-Amps
CHIORBOLI, Giovanni;MORANDI, Carlo
2011-01-01
Abstract
A D/A subconverter (DASC) error correction scheme based on weighting capacitor rotation is adapted to account for finite op-amp gain. Simulations show that reasonable estimates of capacitor mismatch can be obtained even if the actual gain is replaced by a nominal gain differing by as much as a factor of two. DASC capacitor mismatch might therefore be estimated in the foreground at power-up, and most part of the correspondingmismatch noise and mismatch-induced interstage gain error might be cancelled, possibly delegating to a background calibration the task of correcting the remaining interstage gain error, induced by finite op-amp gain and drift with temperature.I documenti in IRIS sono protetti da copyright e tutti i diritti sono riservati, salvo diversa indicazione.
