Single-Reference Foreground Calibration of High-Resolution, High-Speed Pipeline ADCs

The paper presents a digital foreground calibration technique for pipeline analog-to-digital converters (ADCs). While the conventional calibration approach requires additional buffered voltage references, the proposed technique requires only a voltage reference, already available in the converter, thus allowing a significant circuit simplification and silicon area savings. Since the number of buffered voltage references in the conventional calibration algorithm increases exponentially with the resolution of the conversion stages to be calibrated, the proposed technique is suitable for high-resolution, high-speed pipeline ADCs.