In this paper, we discuss some issues related to the design, implementation, and test of a CMOS active pixel sensor chip (RAPS01), developed in the framework of the radiation active pixel sensors (RAPS) INFN project. Two different basic pixel schemes have been proposed. The first one is based on a standard active pixel sensor (APS) architecture, while a second architecture, named weak inversion pixel sensor (WIPS) exploits a different circuitry which allows for "sparse" access mode and thus for speeding-up the readout phase. Chip fabrication has been completed and a preliminary test phase has been performed. A suitable test environment has been devised and test strategies have been planned. Preliminary test results, featuring a static and dynamic characterization of the basic sensitive elements are outlined. Future works are also outlined, aimed at the optimization of a second version of the chip, more effectively integrating smart circuitry.
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