Ultra Low-Power CMOS Voltage References Designed with Automated Flow

This paper presents three-transistor CMOS voltage references (3T-VRs), automatically designed and optimized by means of a CAD framework, the OptiGap. This toolbox, based on Matlab-Spectre co-simulations, has been developed for the automated design of several classes ultra low-power (ULP) VRs, in multiple technology nodes. We report the implementation on silicon of three 3T-VR circuits in TSMC 130-nm BDC technology. The circuits have been designed for minimum temperature coefficient (TC), minimum spread on process corners, and large power supply rejection (PSR), at 1 nanoAmpere of current consumption.In measurements, the 3T-VRs show output voltages well aligned with the simulations, at the specified current consumption. Good metrics in terms of average TC, spread on multiple samples, and PSR are achieved with respect to the state-of-the-art. The reported results demonstrate the high potential for automated design for this class of circuits.