The paper describes the analog baseband circuits for 802.11ba-compliant wake-up radios. A four-stage variable- gain amplifier provides up to 64-dB signal amplification, with a foreground offset cancellation, and it implements the anti-aliasing bandwidth limiting. A low-power Successive Approximation Register A/D converter is used for the input signal digitization, with the high-frequency clock generated by a digital Delay Locked Loop. Implemented in a 40-nm CMOS technology, the analog baseband shows a very small silicon area of 0.063 mm2 with an overall current consumption of 99 μA.
Analog Baseband Circuits for Low-power 802-11ba Wake-up Radio in 40-nm CMOS / Boni, Andrea; Caselli, Michele; Frattini, Francesco; Malena, Francesco; Ronchi, Marco. - (2023). (Intervento presentato al convegno 2023 21st IEEE Interregional NEWCAS Conference (NEWCAS) tenutosi a Edinburgh) [10.1109/NEWCAS57931.2023.10198077].
Analog Baseband Circuits for Low-power 802-11ba Wake-up Radio in 40-nm CMOS
Andrea Boni;Michele Caselli;Francesco Malena;
2023-01-01
Abstract
The paper describes the analog baseband circuits for 802.11ba-compliant wake-up radios. A four-stage variable- gain amplifier provides up to 64-dB signal amplification, with a foreground offset cancellation, and it implements the anti-aliasing bandwidth limiting. A low-power Successive Approximation Register A/D converter is used for the input signal digitization, with the high-frequency clock generated by a digital Delay Locked Loop. Implemented in a 40-nm CMOS technology, the analog baseband shows a very small silicon area of 0.063 mm2 with an overall current consumption of 99 μA.I documenti in IRIS sono protetti da copyright e tutti i diritti sono riservati, salvo diversa indicazione.
