Abstract— A low-dropout (LDO) regulator with a quiescent current in the tens of nanoampere range and operating from 800-mV supply is proposed. A rail-to-rail buffer with zero input– output (I/O) voltage shift and based on the differential flipped voltage follower is used for combined gate and bulk driving of the output device. Therefore, bulk modulation with forward body bias is implemented without any additional amplifier. The proposed buffer is a crucial block for the sub-1-V supply and for limiting the contribution of the output device to the quiescent current. The error amplifier (EA) is adaptively biased with a bias shaper block, which implements a current limiting at high loads and a linear dependence on the output current at moderate loads. The feedback signal for the bias control is the output of the amplifier instead of the gate voltage of the pass device, thus combining a nanoampere bias at light load with the ability to follow a fast output current transient. Finally, a corner-tracking load is used to set the bias current of the output device to the minimum value at the target stability margin over the temperature and process parameters’ space. The LDO was implemented in a 55-nm CMOS technology. The measured quiescent current is 16 nA with a minimum power supply rejection of 42.7 dB up to 50 kHz and a maximum load current of 10 mA. In order to compare the transient behavior of the state-of-the-art designs, a modified figure of merit is proposed, taking into account the penalty caused by the low supply.

A 10-mA LDO With 16-nA IQ and Operating From 800-mV Supply / Adorni, N.; Stanzione, S.; Boni, A.. - In: IEEE JOURNAL OF SOLID-STATE CIRCUITS. - ISSN 0018-9200. - 55:2(2020), pp. 404-413. [10.1109/JSSC.2019.2948820]

A 10-mA LDO With 16-nA IQ and Operating From 800-mV Supply

A. Boni
2020-01-01

Abstract

Abstract— A low-dropout (LDO) regulator with a quiescent current in the tens of nanoampere range and operating from 800-mV supply is proposed. A rail-to-rail buffer with zero input– output (I/O) voltage shift and based on the differential flipped voltage follower is used for combined gate and bulk driving of the output device. Therefore, bulk modulation with forward body bias is implemented without any additional amplifier. The proposed buffer is a crucial block for the sub-1-V supply and for limiting the contribution of the output device to the quiescent current. The error amplifier (EA) is adaptively biased with a bias shaper block, which implements a current limiting at high loads and a linear dependence on the output current at moderate loads. The feedback signal for the bias control is the output of the amplifier instead of the gate voltage of the pass device, thus combining a nanoampere bias at light load with the ability to follow a fast output current transient. Finally, a corner-tracking load is used to set the bias current of the output device to the minimum value at the target stability margin over the temperature and process parameters’ space. The LDO was implemented in a 55-nm CMOS technology. The measured quiescent current is 16 nA with a minimum power supply rejection of 42.7 dB up to 50 kHz and a maximum load current of 10 mA. In order to compare the transient behavior of the state-of-the-art designs, a modified figure of merit is proposed, taking into account the penalty caused by the low supply.
A 10-mA LDO With 16-nA IQ and Operating From 800-mV Supply / Adorni, N.; Stanzione, S.; Boni, A.. - In: IEEE JOURNAL OF SOLID-STATE CIRCUITS. - ISSN 0018-9200. - 55:2(2020), pp. 404-413. [10.1109/JSSC.2019.2948820]
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Utilizza questo identificativo per citare o creare un link a questo documento: https://hdl.handle.net/11381/2865950
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