This paper describes the architecture and the transistor-level implementation of a UHF RFID front-end designed in CMOS 0.35μm technology with limited analog options to comply with EPC Class1/Generation2 standard. Since power acquisition is critical to RFID tag performance, two rectifier architectures are proposed and their performance is assessed by simulation in extended temperature range. In spite of technology constraints, good performance and low power consumption are obtained by the RFID front-end.
An extended temperature range UHF RFID front-end in CMOS 350 nm / Caselli, Michele; Magnanini, Alessandro; Boni, Andrea; Giuffredi, Luca. - ELETTRONICO. - (2015), pp. 377-380. (Intervento presentato al convegno 2015 11th Conference on Ph.D. Research in Microelectronics and Electronics (PRIME)) [10.1109/PRIME.2015.7251414].
An extended temperature range UHF RFID front-end in CMOS 350 nm
CASELLI, MICHELE;MAGNANINI, Alessandro;BONI, Andrea;GIUFFREDI, Luca
2015-01-01
Abstract
This paper describes the architecture and the transistor-level implementation of a UHF RFID front-end designed in CMOS 0.35μm technology with limited analog options to comply with EPC Class1/Generation2 standard. Since power acquisition is critical to RFID tag performance, two rectifier architectures are proposed and their performance is assessed by simulation in extended temperature range. In spite of technology constraints, good performance and low power consumption are obtained by the RFID front-end.I documenti in IRIS sono protetti da copyright e tutti i diritti sono riservati, salvo diversa indicazione.
