This paper presents the design of a low-power, low-voltage latched comparator, suitable for current-mode interpolation, using transconductors instead of current mirrors. Thanks to this approach, higher immunity to device mismatch and overall improved dynamic performance were achieved. The proposed comparator was integrated in a 0.8 μm bipolar complementary metal-oxide-semiconductor technology and implemented in a 200 Ms/s analog/digital converter with 8 bit resolution on a 1 V differential range at 3.3 V supply
3.3V, 200Ms/s BiCMOS comparator for current-mode interpolation using a transconductance stage / Boni, Andrea; G., Melcher; Morandi, Carlo. - In: IEEE JOURNAL OF SOLID-STATE CIRCUITS. - ISSN 0018-9200. - 33:(1998), pp. 1563-1567. [10.1109/4.720405]
3.3V, 200Ms/s BiCMOS comparator for current-mode interpolation using a transconductance stage
BONI, Andrea;MORANDI, Carlo
1998-01-01
Abstract
This paper presents the design of a low-power, low-voltage latched comparator, suitable for current-mode interpolation, using transconductors instead of current mirrors. Thanks to this approach, higher immunity to device mismatch and overall improved dynamic performance were achieved. The proposed comparator was integrated in a 0.8 μm bipolar complementary metal-oxide-semiconductor technology and implemented in a 200 Ms/s analog/digital converter with 8 bit resolution on a 1 V differential range at 3.3 V supplyI documenti in IRIS sono protetti da copyright e tutti i diritti sono riservati, salvo diversa indicazione.
